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Revised Raspberry Pi 5 chip comes with unexpected power savings

raspberry pi 5.1 —

What we don't know is whether 4GB or 8GB Pis will get the tweaked chip design.

The Broadcom SoC used in the original 4GB and 8GB Raspberry Pi 5. The 2GB version uses an updated revision with several small but significant benefits.

Enlarge / The Broadcom SoC used in the original 4GB and 8GB Raspberry Pi 5. The 2GB version uses an updated revision with several small but significant benefits.

Raspberry Pi

When Raspberry Pi introduced a new 2GB version of the Raspberry Pi 5 board earlier this month, CEO Eben Upton said that the board would come with a slightly updated version of the board's Broadcom BCM2712C1 SoC. By removing chip functionality that the Pi 5 didn't use, the new D0 stepping of the chip would use less silicon, reducing its cost.

Raspberry Pi enthusiast and YouTuber Jeff Geerling has performed some firsthand testing of the 2GB Pi 5. As Upton said, the new board is functionally identical to the older 4GB and 8GB boards, with identical performance (as long as whatever workload you're running doesn't benefit from extra RAM, anyway). The new silicon die is also about 33 percent smaller than the old one, which Geerling verified by removing the SoC's heat spreader to expose the silicon underneath and measuring by hand.

Geerling also demonstrated that the 2GB Pi 5 comes with a couple of unexpected benefits that Upton didn't mention in his announcement—that the 2GB Pi 5 runs a little cooler and uses a little less power than the 4GB and 8GB editions. The 2GB Pi used just 2.4 W or power at idle and 8.9 W during a CPU stress test, compared to 3.3 W and 9.8 W in the 4GB version. The SoC of the 2GB Pi measured 30° Celsius at idle and 59° under load, compared to 32° and 63° for the 2GB version. Those are all small but significant differences, given that nothing has changed other than the SoC.

As to the exact functionality that was removed from the chip for the 2GB version of the Pi, the company hasn't gotten specific. But Geerling speculates that it's mostly related to functionality that's being handled by the custom RP1 I/O chip—RP1 handles the Ethernet and USB controllers, display interfaces, and GPIO, among other things.

We also don't know whether the D0 stepping will eventually be used for the 4GB and 8GB versions of the Pi 5 board. Raspberry Pi would likely benefit by standardizing on a single, cheaper chip rather than shipping different steppings on different boards—we've asked the company if it has any plans to share on this front, and we will update if we receive a response.

Source: arstechnica.com

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